i七喜控股 r(PDF资料)

2021年4月26日发(作者：中信证券(600030)中信证券)

元器件交易网
Data Sheet No. PD60209 revC
IR2308
(
S
) & (PbF)
HALF-BRIDGE DRIVER
Features
?
Floating channel designed for bootstrap operation
?
?
?
?
?
?
?
?
?
?
Fully operational to +600V
Tolerant to negative transient voltage
dVdt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
3.3V, 5V and 15V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
Outputs in phase with inputs
Logic and power ground +- 5V offset.
Internal 540ns dead-time
Lower didt gate driver for better noise immunity
Also available LEAD_FREE
Packages
8-Lead SOIC - IR2308S
Also available
LEAD-FREE (PbF)
8-Lead PDIP
IR2308
21042308 Feature Comparison
Part
2106
21064
2108
21084
2109
21094
2304
2308
Input
logic
HINLIN
HINLIN
Cross-
conduction
prevention
logic
no
yes
Dead-TimeGround Pins
COM
VSSCOM
COM
VSSCOM
COM
VSSCOM
none
Internal 540ns
Programmable 0.54~5
?
s
Description
Internal 540ns
The IR2308(S) are high voltage, high speed power
INSDyes
Programmable 0.54~5?s
MOSFET and IGBT drivers with dependent high and
yes
HINLINInternal 100ns
COM
low side referenced output channels. Proprietary HVIC
Internal 540nsCOM
HINLINyes
and latch immune CMOS technologies enable rug-
gedized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse
current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an
N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Typical Connection
up to 600V
V
CC
V
CC
HIN
LIN
V
B
HO
V
S
LO
TO
LOAD
HIN
LIN
COM
(Refer to Lead Assignments for correct pin configuration). ThisThese 银行汇率、外汇汇率
diagram(s) show electrical connections
only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
1

元器件交易网
IR2308(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air |杰克逊最经典的歌曲 conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dV
S
dt
P
D
Rth
JA
T
J
T
S
T
L
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side 银行汇率、外汇汇率
output voltage
Logic input voltage (HIN & LIN )
Allowable offset supply voltage transient
Package power dissipation @ T
A
≤ +25°C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(8 lead PDIP)
(8 lead SOIC)
(8 lead PDIP)
(8 lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
V
SS
- 0.3
—
—
—
—
—
—
-50
—
Max.
625
V
B
+ 0.3
V
B

+ 0.3
25
V
CC
+ 0.3
V
CC

+ 0.3
50
1.0
0.625
125
200
150
150
300
Units
V
Vns
W
°CW
°C
Recommended Operating Conditions
The InputOutput logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at 15V differential.
Symbol
VB
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage
Ambient temperature
Min.
V
S
+ 10
Note 1
V
S
10
0
-40
Max.
V
S
+ 20
600
V
B
20
V
CC
125
Units
V
COM V
CC
°C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).

元器件交易网
IR2308(S) & (PbF)
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
)=15V, V
SS
=COM, C
L
=1000 pF, T
A
=25°C, DT=VSS unless otherwise specified.
Symbol
t
on
t
off
MT
t
r
t
f
DT
MDT
Definition
Turn-on propagation delay
Turn-off propagation delay
Delay matching
|
t
on
- t
off

|
Turn-on rise time
Turn-off fall time
Min. Typ.
—
—
—
—
—
400
—
220
200
0
150
50
540
0
est Conditions
300
280
46
220
80
680
60
nsec
V
S
=0V
V
S
=0V
V
S
=0V
V
S
=0V or 600V
Deadtime: LO turn-off to HO turn-on(DT
LO-HO) &
HO turn-off to LO turn-on (DT
HO-LO)
Deadtime matching=
|
DT
LO-HO
- DT
HO-LO
|
V
BIAS
(V
CC
, V
BS
)=15V, V
SS
=COM, DT=V
SS
and T
A
=25°C unless otherwise specified. The V
IL
, V
IH
and I
IN
parameters are referenced to V
SS
COM and are applicable to the respective input leads: HIN and LIN. The V
O
, I
O
and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Static Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Definition
Logic “1” input voltage for HIN & LIN
Logic “0” input voltage for HIN & LIN
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current
Logic “0” input bias current
V
CC
and V
BS
supply undervoltage positive going
threshold
V
CC
and V
BS
supply undervoltage negative going
threshold
Hysteresis
Output high short circuit pulsed current
Output low short circuit pulsed current
est Conditions
2.9
—
—
—
—
20
0.4
—
—
—
—
0.8
0.3
—
60
1.0
5
1
—
0.8
1.4
0.6
50
150
1.6
20
2
?A
mA
?A
V
V
CC
=10V to 20V
V
CC
=10V to 20V
I
O
=20 mA
I
O
=20 mA
V
B
=V
S
=600V
V
IN
=0V or 5V
V
IN
=0V or 5V
HIN=5V, LIN=5V
HIN=0V, LIN=0V
8.0 8.9 10
7.4
0.3
97
250
8.2
0.7
200
350
9.0
—
—
—
mA
V
O
=0V,
PW ≤ 10 ?s
V
O
=15V,
PW ≤ 10 ?s
V
3

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